*Papers written in English [#qa49ab1b]

**Journals and Transactions [#gaa29794]
-K. Nakazawa, H. Nakamura, T. Boku, I. Nakata and Y. Yamashita, "CP-PACS: A massively parallel processor at the University of Tsukuba", Parallel Computing, Vol. 25, pp.1635-1661, 1999. 
+K. Nakazawa, H. Nakamura, T. Boku, I. Nakata and Y. Yamashita, "CP-PACS: A massively parallel processor at the University of Tsukuba", Parallel Computing, Vol. 25, pp.1635-1661, 1999. 
&br;&br;
+A. Murata, T. Boku, and H. Amano, "The MDX (Multi-Dimensional X'bar): A Class of Networks for Large Scale Multiprocessors" IEICE Trans. on Information and Systems, Vol.E79-D, No.8, 1996. 
&br;&br;
+W. G. Hoover, A. J. De Groot, C. G. Hoover, I. F. Stowers, T. Kawai, B. L. Holian, T. Boku, S. Ihara, and J. Belak, "Large-scale elastic-plastic indentation simulations via nonequilibrium molecular dynamics", Physical Review A, Vol.42, No.10, pp.5844-5853, 1990. 
&br;&br;
+H. Amano, T. Boku, and T. Kudoh, "(SM)^2: A Large-Scale Multiprocessor for Sparse Matrix Calculations", IEEE Transactions on Computer, Vol.39, No.7, pp.889-905, 1990. 

-A. Murata, T. Boku, and H. Amano, "The MDX (Multi-Dimensional X'bar): A Class of Networks for Large Scale Multiprocessors" IEICE Trans. on Information and Systems, Vol.E79-D, No.8, 1996. 

-W. G. Hoover, A. J. De Groot, C. G. Hoover, I. F. Stowers, T. Kawai, B. L. Holian, T. Boku, S. Ihara, and J. Belak, "Large-scale elastic-plastic indentation simulations via nonequilibrium molecular dynamics", Physical Review A, Vol.42, No.10, pp.5844-5853, 1990. 

-H. Amano, T. Boku, and T. Kudoh, "(SM)^2: A Large-Scale Multiprocessor for Sparse Matrix Calculations", IEEE Transactions on Computer, Vol.39, No.7, pp.889-905, 1990. 

**Conference Proceedings [#nac09ce5]
- S. Miura, T. Boku, T. Okamoto, T. Hanawa, "A Dynamic Routing Control System for High-Performance PC Cluster with Multi-path Ethernet Connection", Proc. of CAC2008 (included in Proc. of IPDPS2008), CD-ROM, Miami, 2008.
+S. Miura, T. Boku, T. Okamoto, T. Hanawa, "A Dynamic Routing Control System for High-Performance PC Cluster with Multi-path Ethernet Connection", Proc. of CAC2008 (included in Proc. of IPDPS2008), CD-ROM, Miami, 2008.
&br;&br;
+J. Lee, M. Sato, T. Boku, "Design and Implementation of OpenMPD: An OpenMP-like Programming Language for Distributed Memory Systems", Proc. of Int. Workshop on OpenMP (IWOMP2007), Beijing, 2007.
&br;&br;
+T. Okamoto, S. Miura, T. Boku, M. Sato, D. Takahashi, "RI2N/UDP: High bandwidth and fault-tolerant network for a PC-cluster based on multi-link Ethernet", Proc. of CAC2007 (included in Proc. of IPDPS2007), CD-ROM, Long Beach, 2007.
&br;&br;
+T. Okamoto, T. Boku, M. Sato, T. Osamu, "P2P Overlay Network for TCP Programming with UDP Hole Punching", Proc. of NPC2006, Tokyo, 2006. 
&br;&br;
+H. Kimura, M. Sato, Y. Hotta, T. Boku, D. Takahashi, "Empirical Study on Reducing Energy of Parallel Programs using Slack Reclamation by DVFS", Proc. of Cluster2006, Barcelona, 2006. 
&br;&br;
+S. Sumimoto, K. Ooe, K. Kumon, T. Boku, M. Sato, A. Ukawa, "Scalable Communication Layer for Multi-Dimensional Crossbar Network Using Multiple Gigabit Ethernet", Proc. of ICS2006, Cairns, Australia, 2006. 
&br;&br;
+T. Boku, M. Sato, A. Ukawa, D. Takahashi, S. Sumimoto, K. Kumon, T. Moriyama, M. Shimizu, "PACS-CS: A large-scale bandwidth-aware PC cluster for scientific computations", Proc. of CCGrid2006, Singapore, 2006. 
&br;&br;
+T. Boku, M. Sato, D. Takahashi, H. Nakashima, H. Nakamura, S. Matsuoka, Y. Hotta, "MegaProto?/E: Power-Aware High-Performance Cluster with Commodity Technology", Proc. of HP-PAC06 (in IPDPS2006), Rhodes, Greece, 2006. 
&br;&br;
+S. Miura, T. Okamoto, T. Boku, M. Sato, D. Takahashi, "Low-cost High-bandwidth Tree Network for PC Clusters based on Tagged-VLAN Technology", Proc. of ISPAN2005, pp.84-91, Las Vegas, USA, 2005. 
&br;&br;
+H. Nakashima, H. Nakamura, M. Sato, T. Boku, S. Matsuoka, D. Takahashi, Y. Hotta, "MegaProto?: 1 TFlops/10kW Rack Is Feasible Even with Only Commodity Technology", Proc. of SC05 (CD-ROM), Seattle, USA, 2005. 
&br;&br;
+T. Boku, K. Onuma, M. Sato, Y. Nakajima, D. Takahashi, "Grid environment for computational astrophysics driven by GRAPE-6 with HMCS-G and OmniRPC", Proc. of Joint Workshop on High-Performance Grid Computing and High-Level Parallel Programming Models, IPDPS2005, Denver, USA, 2005. 
&br;&br;
+H. Nakashima, H. Nakamura, M. Sato, T. Boku, S. Matsuoka, D. Takahashi, Y. Hotta, "MegaProto?: A Low-Level and Compact Cluster for High-Performance Computing", Proc. of Workshop on High Performance Power Aware Computing, IPDPS2005, Denver, USA, 2005. 
&br;&br;
+Y. Ojima, M. Sato, T. Boku, D. Takahashi, "Design of Software Distributed Shared Memory System using MPI communication layer", Proc. of 4th International Workshop on OpenMP Experiences and Implementations (WOMPEI2005), Tsukuba, Japan, 2005. 
&br;&br;
+T. Boku, M. Sato, M. Matsubara, D. Takahashi, "OpenMPI - OpenMP like tool for easy programming in MPI", Proc. of 6th European Workshop on OpenMP (EWOMP'04), Stockholm, Sweden, 2004. 
&br;&br;
+C. Takahashi, M. Kondo, T. Boku, D. Takahashi, H. Nakamura, "SCIMA-SMP: On-chip memory processor architecture for SMP", Proc. 3rd Workshop on Memory Performance Issues (WMPI-2004), pp.121-128, Munich, Germany, 2004. 
&br;&br;
+Y. Ohtaki, D. Takahashi, T. Boku, M. Sato, "Parallel Implementation of Strassen's Matrix Multiplication Algorithm for Heterogeneous Clusters", Proceedings of Heterogeneous Computing Workshop 2004 in IPDPS2004, Santa Fe, USA, 2004. 
&br;&br;
+Y. Hotta, M. Sato, T. Boku, D. Takahashi, C. Takahashi, "Measurement and Characterization of Power Consumption of Microprocessors for Power-aware Cluster", Proceedings of CoolChips? VII, Yokohama, Japan, 2004. 
&br;&br;
+K. Onuma, T. Boku, M. Sato, D. Takahashi, H. Susa, M. Umemura, "Heterogeneous Remote Computing System for Computational Astrophysics with OmniRPC", Proceedings of International Workshop on High Performance Grid Computing and Networking, 2004 International Symposium on Applications and Internet, Tokyo, Jan. 2004. 
&br;&br;
+Y. Nakajima, M. Sato, T. Boku, D. Takahashi, H. Gotoh, "Performance Evaluation of OmniRPC in a Grid Environment", Proceedings of International Workshop on High Performance Grid Computing and Networking, 2004 International Symposium on Applications and Internet, Tokyo, Jan. 2004. 
&br;&br;
+S. Miura, T. Boku, M. Sato, D. Takahashi, "RI2N - Interconnection network system for clusters with wide-bandwidth and fault-tolerancy based on multiple links", Proceedings of International Symposium on High Performance Computing 2004 (ISHPC-V), LNCS-2858, pp.342-351, Tokyo, Oct. 2003. 
&br;&br;
+T. Boku, M. Sato, K. Onuma, J. Makino, H. Susa, D. Takahashi, M. Umemura, A. Ukawa, "HMCS-G : grid enabled hybrid computing system for computational astrophysics", Proceedings of Grid and Advanced Network (GAN'03) in CCGrid2003, pp.558-565, Tokyo, May 2003. 
&br;&br;
+M. Sato, T. Boku, D. Takahashi, "OmniRPC: a Grid RPC System for Parallel Programming in Cluster and Grid Environment", Proceedings of CCGrid2003, Tokyo, May 2003. 
&br;&br;
+T. Boku, J. Makino, H. Susa, M. Umemura, T. Fukushige and A. Ukawa, "Heterogeneous Multi-Computer System: A New Paradim of Parallel Processing", Proceedings of 2002 International Conference on Parallel Procesing in Electrical Engineering, Warsaw, Sep. 2002 (invited talk). 
&br;&br;
+T. Boku, J. Makino, H. Susa, M. Umemura, T. Fukushige and A. Ukawa, "Heterogeneous Multi-Computer System: A New Platform for Multi-Paradigm Scientific Simulation", Proceedings of 2002 International Conference on Supercomputing, pp.26-34, New York City, Jun. 2002. 
&br;&br;
+D. Takahashi, M. Sato and T. Boku, "Performance Evaluation of the Hitachi SR8000 Using OpenMP Benchmarks", Proceedings of 4th International Symposium on High Performance Computing (ISHPC 2002), Lecture Notes in Computer Science, No. 2327, pp. 390-400, 2002. 
&br;&br;
+T. Boku, S. Yoshikawa, M. Sato, C. G. Hoover and W. G. Hoover, "Implementation and performance evaluation of SPAM particle code with OpenMP-MPI hybrid programming", Proceedings of European Workshop on OpenMP (EWOMP) 2001, Barcelona, Sep. 2001. 
&br;&br;
+T. Boku, M. Matsubara and K. Itakura, "PIO: Parallel I/O System for\\ Massively Parallel Processors", Proceedings of European High Performance Computing and Network Conference 2001 (LNCS-2110), pp.383-392, Amsterdam, Jun. 2001. 
&br;&br;
+M. Kondo, H. Okawara, H. Nakamura, T. Boku and S. Sakai, "SCIMA: A Novel Processor Architecture for High Performance Computing", Proceedings of HPC Asia'2000, pp.355-360, Beijing, May 2000. 
&br;&br;
+T. Boku, K. Itakura, S. Yoshikawa, M. Kondo and M. Sato, "Performance Analysis of PC-CLUMP based on SMP-Bus Utilization", Proceedings of WCBC'00 (Workshop on Cluster Based Computing 2000), Santa Fe, May 2000. 
&br;&br;
+M. Matsubara, H. Numa, and T. Boku, "Commodity Network based Parallel I/O System for Massively Parallel Processors", Proceedings of PDPTA'99, pp.2424-2429, Las Vegas, Jun. 1999. 
&br;&br;
+T. Boku, M. Mishima, K. Itakura, "VIPPES : A Virtual Parallel Processing System Simulation Environment", Proceedings of HPC Asia'98, pp.843-853, Singapore, Sep. 1998. 
&br;&br;
+M. Matsubara, K. Itakura, T. Boku, "Large Scale Molecular Dynamics Simulations on CP-PACS", Proceedings of HPC Asia'98, pp.321-331, Singapore, Sep. 1998. 
&br;&br;
+K. Kubota, M. Sato, K. Itakura, T. Boku, "Accuracy of fast performance prediction by instrumentation tool EXCIT", Proceedings of HPC Asia'98, pp.1031-1038, Singapore, Sep. 1998. 
&br;&br;
+K. Kutoba, K. Itakura, M. Sato, T. Boku, "Practical Simulation of Large-Scale Parallel Programs and Its Performance Analysis of the NAS Parallel Bechmarks", Proceedings of Euro-Par'98 (LNCS 1470), pp.244-254, Manchester, 1998. 
&br;&br;
+H. Nakamura, K. Itakura, M. Matsubara, T. Boku, K. Nakazawa, "Effectiveness of Register Preloading on CP-PACS Node Processor", Proceedings of Innovative Architecture for Future Generation High-Performance Processors and Systems, pp.83-90, Mauii, Oct. 1997. 
&br;&br;
+T. Boku, K. Itakura, H. Nakamura, K. Nakazawa, "CP-PACS: A massively parallel processor for large scale scientific calculations", Proceedings of ACM International Conference on Supercomputing'97, pp.108-115, Vienna, Jul. 1997. 
&br;&br;
+K. Itakura, T. Boku, H. Nakamura, K. Nakazawa, "Performance evaluation of CP-PACS on CG benchmark", Proceedings of HPC Asia'97, pp.678-683, Seoul, Apr. 1997. 
&br;&br;
+Y. Abei, K. Itakura, T. Boku, H. Nakamura, K. Nakazawa, "Performance Improvement for Matrix Calculation on CP-PACS Node Processor", Proceedings of HPC Asia'97, pp.672-677, Seoul, Apr. 1997. 
&br;&br;
+T. Boku, H. Nakamura, K. Nakazawa, Y. Iwasaki, "The Architecture of Massively Parallel Processor CP-PACS", Proceedings of 2nd pAs, pp.31-40, Aizu, Mar. 1997. 
&br;&br;
+T. Morimoto, K. Saito, H. Nakamura, T. Boku, K. Nakazawa, "Advanced Processor Design Using Hardware Description Language AIDL", Proceedings of Asia and South Pacific Design Automation Conference 1997 (ASP-DAC'97), pp.387-390, Makuhari, Mar. 1997. 
&br;&br;
+A. Murata, T. Boku, T. Harada, H. Amano, "The MDX (Multi-Dimensional X'bar): A class of networks for large scale multiprocessors", Proceedings of 9th International Conference on Parallel and Distributed Computign System (PDCS96), pp.296--303, 1996. 
&br;&br;
+T. Boku, M. Mishima, K. Itakura, H. Nakamura, K. Nakazawa, "VIPPES: A performance pre-evaluation system for parallel processors", Presented at HPCN Europe'96, Brussel, Apr. 1996. 
&br;&br;
+K. Itakura, M. Hattori, T. Boku, H. Nakamura, and K. Nakazawa, "Preliminary evaluation of NAS Parallel Benchmarks on CP-PACS", Proceedings of PERMEAN'95, pp.68-77, Beppu, Aug. 1995. 
&br;&br;
+T. Boku, T. Harada, T. Sone, H. Nakamura, and K. Nakazawa, "INSPIRE : A general purpose network simulator generating system for massively parallel processors", Proceedings of PERMEAN'95, pp.24-33, Beppu, Aug. 1995. 
&br;&br;
+H. Morimoto, K. Yamazaki, H. Nakamura, T. Boku, and K. Nakazawa, "Superscalar Processor Design with Hardware Description Language AIDL", Proceedings of 2nd Asia Pacific Conference on Hardware Description Language, pp.51-58, Nagoya, Oct. 1994. 
&br;&br;
+H. Nakamura, T. Wakabayashi, K. Nakazawa, T. Boku, H. Wada, and Y. Inagami, "Pseudo Vector Processor for High-speed List Vector Computation with Hiding Memory Access Latency", Proceedings of IEEE TENCON'94, pp.338-342, Singapore, Sep. 1994. 
&br;&br;
+H. Nakamura, K. Nakazawa, H. Li, H. Imori, T. Boku, I. Nakata, and Y. Yamashita, "Evaluation of Pseudo Vector Processor based on Slide-Windowed Registers", Proceedings of Hawaii International Conference on System Sciences 27, pp.368-377, Honolulu, Jan. 1994. 
&br;&br;
+H. Nakamura, H. Imori, K. Nakazawa, T. Boku, I. Nakata, Y. Yamashita, H. Wada, and Y. Inagami, "A Scalar Architecture for Pseudo Vector Processing based on Slide-Windowed Registers", Proceedings of ACM International Conference on Supercomputing '93, pp.298-307, Tokyo, Jun. 1993. 
&br;&br;
+T. Boku, A. Murata, and T. Kawai, "Why do experiments and theory disagree on the turbulence transition of the poiseuille flow ?", Proceedings of 4th International Symposium on Computational Fluid Dynamics, pp.121-126, Davis, Sep. 1991. 
&br;&br;
+T. Kimura, T. Boku, T. Kudoh, and H. Amano, "A Concurrent Program Restructuring System for Scientific Calculations", Proceedings of 24th Hawaii International Conference on System Sciences (IEEE/ACM), pp.390-399, Honolulu, Jan. 1991. 
&br;&br;
+T. Boku, S. Nomura, and H. Amano, "IMPULSE: A high performance processing unit for multiprocessors for scientific calculation", Proceedings of 15th International Symposium on Computer Architecture (IEEE/ACM), pp.365-372, Honolulu, Jun. 1988. 
&br;&br;
+T. Boku, T. Kudoh, H. Amano, and H. Aiso, "DIPROS: A distributed processing system for NDL on (SM)^2-II", Proceedings of 20th Hawaii International Conference on System Sciences (IEEE/ACM), pp.208-217, Kona, Jan. 1987. 
&br;&br;
+T. Kudoh, H. Amano, T. Boku, and H. Aiso, "NDL: A language for solving scientific problems on MIMD machines", Proceedings of 1st Super Computing Symposium (IEEE), pp.55-64, Miami, 1985. 
&br;&br;
+H. Amano, T. Boku, T. Kudoh, and H. Aiso, "(SM)^2-II: The new version of the sparse matrix solving machine", Proceedings of 12th International Symposium on Computer Architecture (IEEE/ACM), pp.100-107, 1985. 

- J. Lee, M. Sato, T. Boku, "Design and Implementation of OpenMPD: An OpenMP-like Programming Language for Distributed Memory Systems", Proc. of Int. Workshop on OpenMP (IWOMP2007), Beijing, 2007.

-T. Okamoto, S. Miura, T. Boku, M. Sato, D. Takahashi, "RI2N/UDP: High bandwidth and fault-tolerant network for a PC-cluster based on multi-link Ethernet", Proc. of CAC2007 (included in Proc. of IPDPS2007), CD-ROM, Long Beach, 2007.


-T. Okamoto, T. Boku, M. Sato, T. Osamu, "P2P Overlay Network for TCP Programming with UDP Hole Punching", Proc. of NPC2006, Tokyo, 2006. 

-H. Kimura, M. Sato, Y. Hotta, T. Boku, D. Takahashi, "Empirical Study on Reducing Energy of Parallel Programs using Slack Reclamation by DVFS", Proc. of Cluster2006, Barcelona, 2006. 

-S. Sumimoto, K. Ooe, K. Kumon, T. Boku, M. Sato, A. Ukawa, "Scalable Communication Layer for Multi-Dimensional Crossbar Network Using Multiple Gigabit Ethernet", Proc. of ICS2006, Cairns, Australia, 2006. 

-T. Boku, M. Sato, A. Ukawa, D. Takahashi, S. Sumimoto, K. Kumon, T. Moriyama, M. Shimizu, "PACS-CS: A large-scale bandwidth-aware PC cluster for scientific computations", Proc. of CCGrid2006, Singapore, 2006. 

-T. Boku, M. Sato, D. Takahashi, H. Nakashima, H. Nakamura, S. Matsuoka, Y. Hotta, "MegaProto?/E: Power-Aware High-Performance Cluster with Commodity Technology", Proc. of HP-PAC06 (in IPDPS2006), Rhodes, Greece, 2006. 

-S. Miura, T. Okamoto, T. Boku, M. Sato, D. Takahashi, "Low-cost High-bandwidth Tree Network for PC Clusters based on Tagged-VLAN Technology", Proc. of ISPAN2005, pp.84-91, Las Vegas, USA, 2005. 

-H. Nakashima, H. Nakamura, M. Sato, T. Boku, S. Matsuoka, D. Takahashi, Y. Hotta, "MegaProto?: 1 TFlops/10kW Rack Is Feasible Even with Only Commodity Technology", Proc. of SC05 (CD-ROM), Seattle, USA, 2005. 

-T. Boku, K. Onuma, M. Sato, Y. Nakajima, D. Takahashi, "Grid environment for computational astrophysics driven by GRAPE-6 with HMCS-G and OmniRPC", Proc. of Joint Workshop on High-Performance Grid Computing and High-Level Parallel Programming Models, IPDPS2005, Denver, USA, 2005. 

-H. Nakashima, H. Nakamura, M. Sato, T. Boku, S. Matsuoka, D. Takahashi, Y. Hotta, "MegaProto?: A Low-Level and Compact Cluster for High-Performance Computing", Proc. of Workshop on High Performance Power Aware Computing, IPDPS2005, Denver, USA, 2005. 

-Y. Ojima, M. Sato, T. Boku, D. Takahashi, "Design of Software Distributed Shared Memory System using MPI communication layer", Proc. of 4th International Workshop on OpenMP Experiences and Implementations (WOMPEI2005), Tsukuba, Japan, 2005. 

-T. Boku, M. Sato, M. Matsubara, D. Takahashi, "OpenMPI - OpenMP like tool for easy programming in MPI", Proc. of 6th European Workshop on OpenMP (EWOMP'04), Stockholm, Sweden, 2004. 

-C. Takahashi, M. Kondo, T. Boku, D. Takahashi, H. Nakamura, "SCIMA-SMP: On-chip memory processor architecture for SMP", Proc. 3rd Workshop on Memory Performance Issues (WMPI-2004), pp.121-128, Munich, Germany, 2004. 

-Y. Ohtaki, D. Takahashi, T. Boku, M. Sato, "Parallel Implementation of Strassen's Matrix Multiplication Algorithm for Heterogeneous Clusters", Proceedings of Heterogeneous Computing Workshop 2004 in IPDPS2004, Santa Fe, USA, 2004. 

-Y. Hotta, M. Sato, T. Boku, D. Takahashi, C. Takahashi, "Measurement and Characterization of Power Consumption of Microprocessors for Power-aware Cluster", Proceedings of CoolChips? VII, Yokohama, Japan, 2004. 

-K. Onuma, T. Boku, M. Sato, D. Takahashi, H. Susa, M. Umemura, "Heterogeneous Remote Computing System for Computational Astrophysics with OmniRPC", Proceedings of International Workshop on High Performance Grid Computing and Networking, 2004 International Symposium on Applications and Internet, Tokyo, Jan. 2004. 

-Y. Nakajima, M. Sato, T. Boku, D. Takahashi, H. Gotoh, "Performance Evaluation of OmniRPC in a Grid Environment", Proceedings of International Workshop on High Performance Grid Computing and Networking, 2004 International Symposium on Applications and Internet, Tokyo, Jan. 2004. 

-S. Miura, T. Boku, M. Sato, D. Takahashi, "RI2N - Interconnection network system for clusters with wide-bandwidth and fault-tolerancy based on multiple links", Proceedings of International Symposium on High Performance Computing 2004 (ISHPC-V), LNCS-2858, pp.342-351, Tokyo, Oct. 2003. 

-T. Boku, M. Sato, K. Onuma, J. Makino, H. Susa, D. Takahashi, M. Umemura, A. Ukawa, "HMCS-G : grid enabled hybrid computing system for computational astrophysics", Proceedings of Grid and Advanced Network (GAN'03) in CCGrid2003, pp.558-565, Tokyo, May 2003. 

-M. Sato, T. Boku, D. Takahashi, "OmniRPC: a Grid RPC System for Parallel Programming in Cluster and Grid Environment", Proceedings of CCGrid2003, Tokyo, May 2003. 

-T. Boku, J. Makino, H. Susa, M. Umemura, T. Fukushige and A. Ukawa, "Heterogeneous Multi-Computer System: A New Paradim of Parallel Processing", Proceedings of 2002 International Conference on Parallel Procesing in Electrical Engineering, Warsaw, Sep. 2002 (invited talk). 

-T. Boku, J. Makino, H. Susa, M. Umemura, T. Fukushige and A. Ukawa, "Heterogeneous Multi-Computer System: A New Platform for Multi-Paradigm Scientific Simulation", Proceedings of 2002 International Conference on Supercomputing, pp.26-34, New York City, Jun. 2002. 

-D. Takahashi, M. Sato and T. Boku, "Performance Evaluation of the Hitachi SR8000 Using OpenMP Benchmarks", Proceedings of 4th International Symposium on High Performance Computing (ISHPC 2002), Lecture Notes in Computer Science, No. 2327, pp. 390-400, 2002. 

-T. Boku, S. Yoshikawa, M. Sato, C. G. Hoover and W. G. Hoover, "Implementation and performance evaluation of SPAM particle code with OpenMP-MPI hybrid programming", Proceedings of European Workshop on OpenMP (EWOMP) 2001, Barcelona, Sep. 2001. 

-T. Boku, M. Matsubara and K. Itakura, "PIO: Parallel I/O System for\\ Massively Parallel Processors", Proceedings of European High Performance Computing and Network Conference 2001 (LNCS-2110), pp.383-392, Amsterdam, Jun. 2001. 

-M. Kondo, H. Okawara, H. Nakamura, T. Boku and S. Sakai, "SCIMA: A Novel Processor Architecture for High Performance Computing", Proceedings of HPC Asia'2000, pp.355-360, Beijing, May 2000. 

-T. Boku, K. Itakura, S. Yoshikawa, M. Kondo and M. Sato, "Performance Analysis of PC-CLUMP based on SMP-Bus Utilization", Proceedings of WCBC'00 (Workshop on Cluster Based Computing 2000), Santa Fe, May 2000. 

-M. Matsubara, H. Numa, and T. Boku, "Commodity Network based Parallel I/O System for Massively Parallel Processors", Proceedings of PDPTA'99, pp.2424-2429, Las Vegas, Jun. 1999. 

-T. Boku, M. Mishima, K. Itakura, "VIPPES : A Virtual Parallel Processing System Simulation Environment", Proceedings of HPC Asia'98, pp.843-853, Singapore, Sep. 1998. 

-M. Matsubara, K. Itakura, T. Boku, "Large Scale Molecular Dynamics Simulations on CP-PACS", Proceedings of HPC Asia'98, pp.321-331, Singapore, Sep. 1998. 

-K. Kubota, M. Sato, K. Itakura, T. Boku, "Accuracy of fast performance prediction by instrumentation tool EXCIT", Proceedings of HPC Asia'98, pp.1031-1038, Singapore, Sep. 1998. 

-K. Kutoba, K. Itakura, M. Sato, T. Boku, "Practical Simulation of Large-Scale Parallel Programs and Its Performance Analysis of the NAS Parallel Bechmarks", Proceedings of Euro-Par'98 (LNCS 1470), pp.244-254, Manchester, 1998. 

-H. Nakamura, K. Itakura, M. Matsubara, T. Boku, K. Nakazawa, "Effectiveness of Register Preloading on CP-PACS Node Processor", Proceedings of Innovative Architecture for Future Generation High-Performance Processors and Systems, pp.83-90, Mauii, Oct. 1997. 

-T. Boku, K. Itakura, H. Nakamura, K. Nakazawa, "CP-PACS: A massively parallel processor for large scale scientific calculations", Proceedings of ACM International Conference on Supercomputing'97, pp.108-115, Vienna, Jul. 1997. 

-K. Itakura, T. Boku, H. Nakamura, K. Nakazawa, "Performance evaluation of CP-PACS on CG benchmark", Proceedings of HPC Asia'97, pp.678-683, Seoul, Apr. 1997. 

-Y. Abei, K. Itakura, T. Boku, H. Nakamura, K. Nakazawa, "Performance Improvement for Matrix Calculation on CP-PACS Node Processor", Proceedings of HPC Asia'97, pp.672-677, Seoul, Apr. 1997. 

-T. Boku, H. Nakamura, K. Nakazawa, Y. Iwasaki, "The Architecture of Massively Parallel Processor CP-PACS", Proceedings of 2nd pAs, pp.31-40, Aizu, Mar. 1997. 

-T. Morimoto, K. Saito, H. Nakamura, T. Boku, K. Nakazawa, "Advanced Processor Design Using Hardware Description Language AIDL", Proceedings of Asia and South Pacific Design Automation Conference 1997 (ASP-DAC'97), pp.387-390, Makuhari, Mar. 1997. 

-A. Murata, T. Boku, T. Harada, H. Amano, "The MDX (Multi-Dimensional X'bar): A class of networks for large scale multiprocessors", Proceedings of 9th International Conference on Parallel and Distributed Computign System (PDCS96), pp.296--303, 1996. 

-T. Boku, M. Mishima, K. Itakura, H. Nakamura, K. Nakazawa, "VIPPES: A performance pre-evaluation system for parallel processors", Presented at HPCN Europe'96, Brussel, Apr. 1996. 

-K. Itakura, M. Hattori, T. Boku, H. Nakamura, and K. Nakazawa, "Preliminary evaluation of NAS Parallel Benchmarks on CP-PACS", Proceedings of PERMEAN'95, pp.68-77, Beppu, Aug. 1995. 

-T. Boku, T. Harada, T. Sone, H. Nakamura, and K. Nakazawa, "INSPIRE : A general purpose network simulator generating system for massively parallel processors", Proceedings of PERMEAN'95, pp.24-33, Beppu, Aug. 1995. 

-H. Morimoto, K. Yamazaki, H. Nakamura, T. Boku, and K. Nakazawa, "Superscalar Processor Design with Hardware Description Language AIDL", Proceedings of 2nd Asia Pacific Conference on Hardware Description Language, pp.51-58, Nagoya, Oct. 1994. 

-H. Nakamura, T. Wakabayashi, K. Nakazawa, T. Boku, H. Wada, and Y. Inagami, "Pseudo Vector Processor for High-speed List Vector Computation with Hiding Memory Access Latency", Proceedings of IEEE TENCON'94, pp.338-342, Singapore, Sep. 1994. 

-H. Nakamura, K. Nakazawa, H. Li, H. Imori, T. Boku, I. Nakata, and Y. Yamashita, "Evaluation of Pseudo Vector Processor based on Slide-Windowed Registers", Proceedings of Hawaii International Conference on System Sciences 27, pp.368-377, Honolulu, Jan. 1994. 

-H. Nakamura, H. Imori, K. Nakazawa, T. Boku, I. Nakata, Y. Yamashita, H. Wada, and Y. Inagami, "A Scalar Architecture for Pseudo Vector Processing based on Slide-Windowed Registers", Proceedings of ACM International Conference on Supercomputing '93, pp.298-307, Tokyo, Jun. 1993. 

-T. Boku, A. Murata, and T. Kawai, "Why do experiments and theory disagree on the turbulence transition of the poiseuille flow ?", Proceedings of 4th International Symposium on Computational Fluid Dynamics, pp.121-126, Davis, Sep. 1991. 

-T. Kimura, T. Boku, T. Kudoh, and H. Amano, "A Concurrent Program Restructuring System for Scientific Calculations", Proceedings of 24th Hawaii International Conference on System Sciences (IEEE/ACM), pp.390-399, Honolulu, Jan. 1991. 

-T. Boku, S. Nomura, and H. Amano, "IMPULSE: A high performance processing unit for multiprocessors for scientific calculation", Proceedings of 15th International Symposium on Computer Architecture (IEEE/ACM), pp.365-372, Honolulu, Jun. 1988. 

-T. Boku, T. Kudoh, H. Amano, and H. Aiso, "DIPROS: A distributed processing system for NDL on (SM)^2-II", Proceedings of 20th Hawaii International Conference on System Sciences (IEEE/ACM), pp.208-217, Kona, Jan. 1987. 

-T. Kudoh, H. Amano, T. Boku, and H. Aiso, "NDL: A language for solving scientific problems on MIMD machines", Proceedings of 1st Super Computing Symposium (IEEE), pp.55-64, Miami, 1985. 

-H. Amano, T. Boku, T. Kudoh, and H. Aiso, "(SM)^2-II: The new version of the sparse matrix solving machine", Proceedings of 12th International Symposium on Computer Architecture (IEEE/ACM), pp.100-107, 1985. 

*[[Japanese Papers]] [#qa09d8ef]
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