HWLOC_SOLARIS_CHIP_INFO_L1I  197 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris-chiptype.c     HWLOC_BUILD_ASSERT(INDEX_L1I_CACHE_SIZE+HWLOC_SOLARIS_CHIP_INFO_L1I == INDEX_L1I_CACHE_SIZE);
HWLOC_SOLARIS_CHIP_INFO_L1I  207 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris-chiptype.c     HWLOC_BUILD_ASSERT(INDEX_L1I_CACHE_LINESIZE+HWLOC_SOLARIS_CHIP_INFO_L1I == INDEX_L1I_CACHE_LINESIZE);
HWLOC_SOLARIS_CHIP_INFO_L1I  217 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris-chiptype.c     HWLOC_BUILD_ASSERT(INDEX_L1I_CACHE_ASSOCIATIVITY+HWLOC_SOLARIS_CHIP_INFO_L1I == INDEX_L1I_CACHE_ASSOCIATIVITY);
HWLOC_SOLARIS_CHIP_INFO_L1I  601 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris.c     chip_info.cache_size[HWLOC_SOLARIS_CHIP_INFO_L1I] = -1;
HWLOC_SOLARIS_CHIP_INFO_L1I  626 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris.c   if (is_sparc && chip_info.cache_size[HWLOC_SOLARIS_CHIP_INFO_L1I] >= 0) {
HWLOC_SOLARIS_CHIP_INFO_L1I  627 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris.c     hwloc_debug("Will generate L1i caches from cores and PICL cache index #%u\n", HWLOC_SOLARIS_CHIP_INFO_L1I);
HWLOC_SOLARIS_CHIP_INFO_L1I  910 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris.c 	l1i->attr->cache.size = chip_info.cache_size[HWLOC_SOLARIS_CHIP_INFO_L1I];
HWLOC_SOLARIS_CHIP_INFO_L1I  911 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris.c 	l1i->attr->cache.linesize = chip_info.cache_linesize[HWLOC_SOLARIS_CHIP_INFO_L1I];
HWLOC_SOLARIS_CHIP_INFO_L1I  912 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-solaris.c 	l1i->attr->cache.associativity = chip_info.cache_associativity[HWLOC_SOLARIS_CHIP_INFO_L1I];