This source file includes following definitions.
- opal_atomic_mb
- opal_atomic_rmb
- opal_atomic_wmb
- opal_atomic_isync
- opal_atomic_compare_exchange_strong_32
- opal_atomic_swap_32
- opal_atomic_fetch_add_32
- opal_atomic_fetch_sub_32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 #ifndef OPAL_SYS_ARCH_ATOMIC_H
26 #define OPAL_SYS_ARCH_ATOMIC_H 1
27
28
29
30
31
32 #define SMPLOCK "lock; "
33 #define MB() __asm__ __volatile__("": : :"memory")
34
35
36
37
38
39
40
41 #define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
42
43 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
44
45 #define OPAL_HAVE_ATOMIC_MATH_32 1
46 #define OPAL_HAVE_ATOMIC_ADD_32 1
47 #define OPAL_HAVE_ATOMIC_SUB_32 1
48
49
50
51
52
53
54 #if OPAL_GCC_INLINE_ASSEMBLY
55
56 static inline void opal_atomic_mb(void)
57 {
58 MB();
59 }
60
61
62 static inline void opal_atomic_rmb(void)
63 {
64 MB();
65 }
66
67
68 static inline void opal_atomic_wmb(void)
69 {
70 MB();
71 }
72
73 static inline void opal_atomic_isync(void)
74 {
75 }
76
77 #endif
78
79
80
81
82
83
84
85 #if OPAL_GCC_INLINE_ASSEMBLY
86
87 static inline bool opal_atomic_compare_exchange_strong_32 (opal_atomic_int32_t *addr, int32_t *oldval, int32_t newval)
88 {
89 unsigned char ret;
90 __asm__ __volatile__ (
91 SMPLOCK "cmpxchgl %3,%2 \n\t"
92 "sete %0 \n\t"
93 : "=qm" (ret), "+a" (*oldval), "+m" (*addr)
94 : "q"(newval)
95 : "memory", "cc");
96
97 return (bool) ret;
98 }
99
100 #endif
101
102 #define opal_atomic_compare_exchange_strong_acq_32 opal_atomic_compare_exchange_strong_32
103 #define opal_atomic_compare_exchange_strong_rel_32 opal_atomic_compare_exchange_strong_32
104
105 #if OPAL_GCC_INLINE_ASSEMBLY
106
107 #define OPAL_HAVE_ATOMIC_SWAP_32 1
108
109 static inline int32_t opal_atomic_swap_32( opal_atomic_int32_t *addr,
110 int32_t newval)
111 {
112 int32_t oldval;
113
114 __asm__ __volatile__("xchg %1, %0" :
115 "=r" (oldval), "=m" (*addr) :
116 "0" (newval), "m" (*addr) :
117 "memory");
118 return oldval;
119 }
120
121 #endif
122
123
124 #if OPAL_GCC_INLINE_ASSEMBLY
125
126
127
128
129
130
131
132
133 static inline int32_t opal_atomic_fetch_add_32(opal_atomic_int32_t* v, int i)
134 {
135 int ret = i;
136 __asm__ __volatile__(
137 SMPLOCK "xaddl %1,%0"
138 :"+m" (*v), "+r" (ret)
139 :
140 :"memory", "cc"
141 );
142 return ret;
143 }
144
145
146
147
148
149
150
151
152
153 static inline int32_t opal_atomic_fetch_sub_32(opal_atomic_int32_t* v, int i)
154 {
155 int ret = -i;
156 __asm__ __volatile__(
157 SMPLOCK "xaddl %1,%0"
158 :"+m" (*v), "+r" (ret)
159 :
160 :"memory", "cc"
161 );
162 return ret;
163 }
164
165 #endif
166
167 #endif