1 /*
2 * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
3 * University Research and Technology
4 * Corporation. All rights reserved.
5 * Copyright (c) 2004-2014 The University of Tennessee and The University
6 * of Tennessee Research Foundation. All rights
7 * reserved.
8 * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
9 * University of Stuttgart. All rights reserved.
10 * Copyright (c) 2004-2005 The Regents of the University of California.
11 * All rights reserved.
12 * $COPYRIGHT$
13 *
14 * Additional copyrights may follow
15 *
16 * $HEADER$
17 */
18
19 #ifndef OPAL_SYS_ARCH_TIMER_H
20 #define OPAL_SYS_ARCH_TIMER_H 1
21
22
23 typedef uint64_t opal_timer_t;
24
25 /* Using RDTSC(P) results in non-monotonic timers across cores */
26 #undef OPAL_TIMER_MONOTONIC
27 #define OPAL_TIMER_MONOTONIC 0
28
29 #if OPAL_GCC_INLINE_ASSEMBLY
30
31 static inline opal_timer_t
32 opal_sys_timer_get_cycles(void)
33 {
34 opal_timer_t ret;
35 int tmp;
36
37 __asm__ __volatile__(
38 "xchgl %%ebx, %1\n"
39 "cpuid\n"
40 "xchgl %%ebx, %1\n"
41 "rdtsc\n"
42 : "=A"(ret), "=r"(tmp)
43 :: "ecx");
44
45 return ret;
46 }
47
48 #define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
49
50 #else
51
52 #define OPAL_HAVE_SYS_TIMER_GET_CYCLES 0
53
54 #endif /* OPAL_GCC_INLINE_ASSEMBLY */
55
56 #endif /* ! OPAL_SYS_ARCH_TIMER_H */