root/opal/include/opal/sys/x86_64/timer.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. opal_sys_timer_get_cycles
  2. opal_sys_timer_is_monotonic

   1 /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */
   2 /*
   3  * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
   4  *                         University Research and Technology
   5  *                         Corporation.  All rights reserved.
   6  * Copyright (c) 2004-2014 The University of Tennessee and The University
   7  *                         of Tennessee Research Foundation.  All rights
   8  *                         reserved.
   9  * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
  10  *                         University of Stuttgart.  All rights reserved.
  11  * Copyright (c) 2004-2005 The Regents of the University of California.
  12  *                         All rights reserved.
  13  * Copyright (c) 2016      Los Alamos National Security, LLC. ALl rights
  14  *                         reserved.
  15  * $COPYRIGHT$
  16  *
  17  * Additional copyrights may follow
  18  *
  19  * $HEADER$
  20  */
  21 
  22 #ifndef OPAL_SYS_ARCH_TIMER_H
  23 #define OPAL_SYS_ARCH_TIMER_H 1
  24 
  25 
  26 typedef uint64_t opal_timer_t;
  27 
  28 /* Using RDTSC(P) results in non-monotonic timers across cores */
  29 #undef OPAL_TIMER_MONOTONIC
  30 #define OPAL_TIMER_MONOTONIC 0
  31 
  32 #if OPAL_GCC_INLINE_ASSEMBLY
  33 
  34 /* TODO: add AMD mfence version and dispatch at init */
  35 static inline opal_timer_t
  36 opal_sys_timer_get_cycles(void)
  37 {
  38      uint32_t l, h;
  39      __asm__ __volatile__ ("lfence\n\t"
  40                            "rdtsc\n\t"
  41                            : "=a" (l), "=d" (h));
  42      return ((opal_timer_t)l) | (((opal_timer_t)h) << 32);
  43 }
  44 
  45 static inline bool opal_sys_timer_is_monotonic (void)
  46 {
  47     int64_t tmp;
  48     int32_t cpuid1, cpuid2;
  49     const int32_t level = 0x80000007;
  50 
  51     /* cpuid clobbers ebx but it must be restored for -fPIC so save
  52      * then restore ebx */
  53     __asm__ volatile ("xchg %%rbx, %2\n"
  54                       "cpuid\n"
  55                       "xchg %%rbx, %2\n":
  56                       "=a" (cpuid1), "=d" (cpuid2), "=r" (tmp) :
  57                       "a" (level) :
  58                       "ecx", "ebx");
  59     /* bit 8 of edx contains the invariant tsc flag */
  60     return !!(cpuid2 & (1 << 8));
  61 }
  62 
  63 #define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
  64 #define OPAL_HAVE_SYS_TIMER_IS_MONOTONIC 1
  65 
  66 #else
  67 
  68 #define OPAL_HAVE_SYS_TIMER_GET_CYCLES 0
  69 
  70 #endif /* OPAL_GCC_INLINE_ASSEMBLY */
  71 
  72 #endif /* ! OPAL_SYS_ARCH_TIMER_H */

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