maxgen             77 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-nvml.c 	unsigned maxwidth = 0, maxgen = 0;
maxgen             80 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-nvml.c 	nvmlDeviceGetMaxPcieLinkGeneration(device, &maxgen);
maxgen             85 opal/mca/hwloc/hwloc201/hwloc/hwloc/topology-nvml.c 	lanespeed = maxgen <= 2 ? 2.5 * maxgen * 0.8 : 8.0 * 128/130; /* Gbit/s per lane */