This source file includes following definitions.
- opal_atomic_mb
- opal_atomic_rmb
- opal_atomic_wmb
- opal_atomic_isync
- opal_atomic_compare_exchange_strong_32
- opal_atomic_compare_exchange_strong_acq_32
- opal_atomic_compare_exchange_strong_rel_32
- opal_atomic_compare_exchange_strong_64
- opal_atomic_compare_exchange_strong_64
- opal_atomic_compare_exchange_strong_acq_64
- opal_atomic_compare_exchange_strong_rel_64
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25 #ifndef OPAL_SYS_ARCH_ATOMIC_H
26 #define OPAL_SYS_ARCH_ATOMIC_H 1
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31
32 #define ASI_P "0x80"
33
34 #define MEMBAR(type) __asm__ __volatile__ ("membar " type : : : "memory")
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42 #define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
43
44 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
45
46 #define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_64 1
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53
54 #if OPAL_GCC_INLINE_ASSEMBLY
55
56 static inline void opal_atomic_mb(void)
57 {
58 MEMBAR("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad");
59 }
60
61
62 static inline void opal_atomic_rmb(void)
63 {
64 MEMBAR("#LoadLoad");
65 }
66
67
68 static inline void opal_atomic_wmb(void)
69 {
70 MEMBAR("#StoreStore");
71 }
72
73 static inline void opal_atomic_isync(void)
74 {
75 }
76
77
78 #endif
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85
86 #if OPAL_GCC_INLINE_ASSEMBLY
87
88 static inline bool opal_atomic_compare_exchange_strong_32 (opal_atomic_int32_t *addr, int32_t *oldval, int32_t newval)
89 {
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98 int32_t prev = newval;
99 bool ret;
100
101 __asm__ __volatile__("casa [%1] " ASI_P ", %2, %0"
102 : "+r" (prev)
103 : "r" (addr), "r" (*oldval));
104 ret = (prev == *oldval);
105 *oldval = prev;
106 return ret;
107 }
108
109
110 static inline bool opal_atomic_compare_exchange_strong_acq_32 (opal_atomic_int32_t *addr, int32_t *oldval, int32_t newval)
111 {
112 bool rc;
113
114 rc = opal_atomic_compare_exchange_strong_32 (addr, oldval, newval);
115 opal_atomic_rmb();
116
117 return rc;
118 }
119
120
121 static inline bool opal_atomic_compare_exchange_strong_rel_32 (opal_atomic_int32_t *addr, int32_t *oldval, int32_t newval)
122 {
123 opal_atomic_wmb();
124 return opal_atomic_compare_exchange_strong_32 (addr, oldval, newval);
125 }
126
127
128 #if OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_64
129
130 static inline bool opal_atomic_compare_exchange_strong_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
131 {
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139 int64_t prev = newval;
140 bool ret;
141
142 __asm__ __volatile__("casxa [%1] " ASI_P ", %2, %0"
143 : "+r" (prev)
144 : "r" (addr), "r" (*oldval));
145 ret = (prev == *oldval);
146 *oldval = prev;
147 return ret;
148 }
149
150 #else
151
152 static inline bool opal_atomic_compare_exchange_strong_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
153 {
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162 int64_t prev = newval;
163 bool ret;
164
165 __asm__ __volatile__(
166 "ldx %0, %%g1 \n\t"
167 "ldx %2, %%g2 \n\t"
168 "casxa [%1] " ASI_P ", %%g2, %%g1 \n\t"
169 "stx %%g1, %0 \n"
170 : "+m"(prev)
171 : "r"(addr), "m"(*oldval)
172 : "%g1", "%g2"
173 );
174
175 ret = (prev == *oldval);
176 *oldval = prev;
177 return ret;
178 }
179
180 #endif
181
182 static inline bool opal_atomic_compare_exchange_strong_acq_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
183 {
184 bool rc;
185
186 rc = opal_atomic_compare_exchange_strong_64 (addr, oldval, newval);
187 opal_atomic_rmb();
188
189 return rc;
190 }
191
192
193 static inline bool opal_atomic_compare_exchange_strong_rel_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
194 {
195 opal_atomic_wmb();
196 return opal_atomic_compare_exchange_strong_64 (addr, oldval, newval);
197 }
198
199 #endif
200
201
202 #endif