1 /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */
2 /*
3 * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
4 * University Research and Technology
5 * Corporation. All rights reserved.
6 * Copyright (c) 2004-2005 The University of Tennessee and The University
7 * of Tennessee Research Foundation. All rights
8 * reserved.
9 * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
10 * University of Stuttgart. All rights reserved.
11 * Copyright (c) 2004-2005 The Regents of the University of California.
12 * All rights reserved.
13 * Copyright (c) 2006-2007 Voltaire. All rights reserved.
14 * Copyright (c) 2012 NVIDIA Corporation. All rights reserved.
15 * Copyright (c) 2015 Los Alamos National Security, LLC. All rights
16 * reserved.
17 * $COPYRIGHT$
18 *
19 * Additional copyrights may follow
20 *
21 * $HEADER$
22 */
23 /**
24 * @file
25 */
26 #ifndef MCA_BTL_SMCUDA_ENDPOINT_H
27 #define MCA_BTL_SMCUDA_ENDPOINT_H
28
29 /**
30 * An abstraction that represents a connection to a endpoint process.
31 * An instance of mca_ptl_base_endpoint_t is associated w/ each process
32 * and BTL pair at startup.
33 */
34
35 struct mca_btl_base_endpoint_t {
36 int my_smp_rank; /**< My SMP process rank. Used for accessing
37 * SMP specfic data structures. */
38 int peer_smp_rank; /**< My peer's SMP process rank. Used for accessing
39 * SMP specfic data structures. */
40 #if OPAL_CUDA_SUPPORT
41 mca_rcache_base_module_t *rcache; /**< rcache for remotely registered memory */
42 #endif /* OPAL_CUDA_SUPPORT */
43 #if OPAL_ENABLE_PROGRESS_THREADS == 1
44 int fifo_fd; /**< pipe/fifo used to signal endpoint that data is queued */
45 #endif
46 opal_list_t pending_sends; /**< pending data to send */
47
48 /** lock for concurrent access to endpoint state */
49 opal_mutex_t endpoint_lock;
50
51 #if OPAL_CUDA_SUPPORT
52 opal_proc_t *proc_opal; /**< Needed for adding CUDA IPC support dynamically */
53 enum ipcState ipcstate; /**< CUDA IPC connection status */
54 int ipctries; /**< Number of times CUDA IPC connect was sent */
55 #endif /* OPAL_CUDA_SUPPORT */
56 };
57
58 void btl_smcuda_process_pending_sends(struct mca_btl_base_endpoint_t *ep);
59 #endif